Logic Gates: The Foundation of Digital Electronics

Logic gates are transistor circuits that implement Boolean operations on digital signals. They are the building blocks of adders, registers, multiplexers, memory, processors, microcontrollers, and FPGAs.

Learning Objectives

By the end of this lesson, you should be able to read truth tables for basic gates, write Boolean expressions, explain universal gates, connect logic gates to real voltage levels, and avoid common hardware mistakes such as floating inputs and overloaded outputs.

Digital Levels

Digital circuits treat voltage ranges as logic states, not perfect mathematical values.

LOW means a voltage below the input-low threshold.
HIGH means a voltage above the input-high threshold.
The invalid region between thresholds should be avoided.
Common logic families include 5 V TTL/CMOS, 3.3 V CMOS, 1.8 V logic, and lower core voltages inside ICs.

Always check datasheet thresholds before connecting different devices.

Basic Gates

AND Gate

AND gate

The output is HIGH only when all inputs are HIGH.

A	B	Y
0	0	0
0	1	0
1	0	0
1	1	1

$$
Y=A\cdot B
$$

OR Gate

OR gate

The output is HIGH when any input is HIGH.

A	B	Y
0	0	0
0	1	1
1	0	1
1	1	1

$$
Y=A+B
$$

NOT Gate

NOT gate

The output is the inverse of the input.

A	Y
0	1
1	0

$$
Y=\overline{A}
$$

Derived Gates

Gate	Meaning	Common use
NAND	NOT AND	universal logic, enable signals
NOR	NOT OR	universal logic, reset logic
XOR	HIGH when inputs differ	adders, parity, toggles
XNOR	HIGH when inputs match	equality checks

NAND and NOR are called universal gates because either one can be combined to implement any Boolean logic function.

Worked Example: Half Adder

A half adder adds two one-bit numbers. The sum is HIGH when the inputs differ, and the carry is HIGH when both inputs are HIGH.

$$
SUM=A\oplus B
$$

$$
CARRY=A\cdot B
$$

A	B	SUM	CARRY
0	0	0	0
0	1	1	0
1	0	1	0
1	1	0	1

flowchart LR A[A] --> XOR[XOR] B[B] --> XOR A --> AND[AND] B --> AND XOR --> SUM[SUM] AND --> C[CARRY]

Boolean Simplification

Boolean algebra reduces gate count and delay.

A . 1 = A
A + 0 = A
A . 0 = 0
A + 1 = 1
A + Abar = 1
A . Abar = 0

The same logic can often be implemented in several equivalent ways. The best form depends on available gates, delay, power, and readability.

Gates in Real Hardware

A gate output can drive only limited current and input capacitance. Real gates also have propagation delay:

$$
t_{PD}=t_{output\ change}-t_{input\ change}
$$

Large logic networks must meet timing, especially in counters, memories, and FPGA designs.

Practical Checks

Tie unused inputs to a valid HIGH or LOW through a suitable connection.
Confirm voltage-level compatibility before connecting IC families.
Use pull-up or pull-down resistors for switches and open-drain signals.
Do not drive motors, relays, or LEDs directly from weak logic outputs unless current limits allow it.
Check propagation delay when logic feeds clocks, resets, or fast control paths.

Common Mistakes

Leaving CMOS inputs floating.
Treating 3.3 V and 5 V logic as automatically compatible.
Forgetting that switches bounce.
Drawing correct Boolean logic but violating output current limits.
Ignoring active-low signal names such as RESET_N or CS_N.

Summary

Logic gates implement Boolean operations using real voltage thresholds and transistor circuits. AND, OR, NOT, NAND, NOR, XOR, and XNOR combine into arithmetic, control, memory, and programmable logic. Good digital design checks both truth tables and electrical limits.

Mind Map

mindmap root((Logic Gates)) Core concept Boolean decisions Voltage thresholds Transistor circuits Applications Adders Control logic Registers FPGA LUTs Formulas AND Y equals A dot B OR Y equals A plus B NOT Y equals Abar Delay tPD Design rules No floating inputs Check logic levels Limit output current Respect active low Practical checks Truth table Pull resistor Fanout Propagation delay Common mistakes Mixed voltages Switch bounce Overloaded output Wrong inversion